Nicholas Sperlein
Millersville,MD
Summary
Superconducting Circuit Design Engineer with experience leading 15+ ASIC tape-outs for quantum and RQL control systems at Northrop Grumman. Combines end-to-end chip design expertise (Cadence Virtuoso, Keysight ADS, ANSYS) with hands-on fabrication, metrology, and cryogenic experimental systems. Proven technical leader with experience training engineers and driving accelerated design cycles.
Overview
6
6
years of professional experience
Work History
Superconducting Circuit Design Engineer
Northrop Grumman
01.2023 - Current
- Led design and tape-out of 15+ superconducting ASIC chip assemblies, consistently delivering LVS/DRC-clean layouts under aggressive schedules
- Designed multi-layer superconducting circuits (up to 13 layers) for RQL control and qubit systems, meeting strict performance and integration requirements
- Developed ASICs using Cadence Virtuoso, Keysight ADS, and ANSYS HFSS, covering simulation, layout, and verification
- Designed resonator PCM structures for parasitic characterization, Q-factor extraction, and process evaluation
- Collaborated with cross-functional teams (fabrication, theory, system engineering) to deliver complete tape-out packages
- Contributed to quantum hardware development including single-qubit S-gate devices, CZ gate architectures, and RF noise mitigation experiments
- Selected as Chair of Quantum Design Training, leading onboarding and technical development initiatives
- Built and implemented a full training curriculum + DOE framework enabling new hires to execute full chip tape-outs
- Trained 10+ engineers with no prior quantum design experience on advanced superconducting design workflows
- Established structured mentorship programs, improving ramp time and design consistency across teams
Superconducting Microelectronics Inspector
Northrop Grumman
01.2023 - 11.2023
- Performed inspection of superconducting wafers in Class 100 cleanroom environment
- Analyzed devices using SEM, optical microscopy, thin-film metrology, and profilometry
- Identified fabrication defects across photolithography, etch, and planarization processes
- Verified critical device structures including Josephson junctions, vias, and resistors
- Certified in Six Sigma Root Cause Analysis
Engineering Technician
Dynaflow Inc.
01.2020 - 01.2023
- Designed and tested NASA cryogenic phase separator for LN2 transfer systems
- Conducted experiments in high-speed imaging and PIV for fluid dynamics analysis
- Built and operated experimental systems including supercavitation tunnels and thermal control setups
- Fabricated custom test rigs using machining tools (lathes, mills) and integrated instrumentation systems
- Operated and maintained precision measurement instruments to ensure quality control in engineering processes.
- Conducted routine inspections and preventive maintenance on machinery, reducing downtime and improving reliability.
Education
B.S. - Applied Physics
Towson University
12.2019
Skills
- Design & Simulation: Cadence Virtuoso, Keysight ADS, ANSYS HFSS/Maxwell
- Fabrication & Metrology: SEM, thin-film measurement, profilometry, cleanroom processes
- Hardware Systems: Cryogenic systems, RF diagnostics, experimental instrumentation ie thermocouples, oscilloscopes, voltage/current meters
- Six Sigma Root Cause Analysis
Timeline
Superconducting Circuit Design Engineer
Northrop Grumman
01.2023 - Current
Superconducting Microelectronics Inspector
Northrop Grumman
01.2023 - 11.2023
Engineering Technician
Dynaflow Inc.
01.2020 - 01.2023
B.S. - Applied Physics
Towson University
Bravo Award
Bravo to our stars award received from program director. Overcame a critical infrastructure failure and completed a design tape-out in ~50% of expected schedule.